sil9136 datasheet(SiI

ContentsAcronyms in This Document.................................................................................................................................................61. General Description ......................................................................................................................................................71.1. Video Input ...........................................................................................................................................................71.2. Audio Input ...........................................................................................................................................................71.3. HDMI Output ........................................................................................................................................................71.4. Control Capability .................................................................................................................................................71.5. Packaging ..............................................................................................................................................................72. Product Family ..............................................................................................................................................................83. Functional Description..................................................................................................................................................93.1. Video Data Input and Conversion .........................................................................................................................93.1.1. Input Clock Multiplier/Divider ....................................................................................................................103.1.2. Video Data Capture.....................................................................................................................................103.1.3. Embedded Sync Decoder............................................................................................................................103.1.4. Data Enable Generator ...............................................................................................................................103.1.5. Combiner ....................................................................................................................................................103.1.6. 4:2:2 to 4:4:4 Upsampler ............................................................................................................................103.1.7. RGB Range Expansion .................................................................................................................................103.1.8. Color Space Converter ................................................................................................................................113.1.9. RGB/YCbCr Range Compression .................................................................................................................113.1.10. 4:4:4 to 4:2:2 Downsampler .......................................................................................................................113.1.11. Clipping .......................................................................................................................................................113.1.12. 18-to-8/10/12/16-Dither ............................................................................................................................113.2. Audio Data Capture.............................................................................................................................................113.3. Framer.................................................................................................................................................................113.4. HDCP Encryption Engine/XOR Mask ...................................................................................................................113.5. HDCP Key ROM ...................................................................................................................................................123.6. TMDS Transmitter...............................................................................................................................................123.7. GPIO....................................................................................................................................................................123.8. Hot Plug Detector ...............................................................................................................................................123.9. CEC Interface.......................................................................................................................................................123.10. DDC Master I2C Interface ................................................................................................................................123.11. Receiver Sense and Interrupt Logic ................................................................................................................133.12. Configuration Logic and Registers ..................................................................................................................133.13. I2C Slave Interface ...........................................................................................................................................134. Electrical Specifications ..............................................................................................................................................144.1. Absolute Maximum Conditions ..........................................................................................................................144.2. Normal Operating Conditions.............................................................................................................................144.2.1. I/O Specifications........................................................................................................................................154.2.2. DC Power Supply Specifications..................................................................................................................164.3. AC Specifications.................................................................................................................................................164.3.1. Video/HDMI Timing Specifications .............................................................................................................164.3.2. Audio AC Timing Specifications...................................................................................................................174.3.3. Video AC Timing Specifications...................................................................................................................184.3.4. Control Signal Timing Specifications...........................................................................................................184.3.5. CEC Timing Specifications ...........................................................................................................................194.4. Timing Diagrams .................................................................................................................................................194.4.1. Input Timing Diagrams................................................................................................................................194.4.2. Reset Timing Diagrams ...............................................................................................................................204.4.3. TMDS Timing Diagram ................................................................................................................................204.4.4. Audio Timing Diagrams...............................................................................................................................214.4.5. I2C Timing Diagrams....................................................................................................................................215. Pin Diagram and Descriptions.....................................................................................................................................22SiI9136-3/SiI1136 HDMI Deep Color TransmitterData Sheet© 2010-2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names aretrademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.SiI-DS-1084-D 35.1. Pin Diagram.........................................................................................................................................................225.2. Pin Descriptions..................................................................................................................................................235.2.1. Video Data Input.........................................................................................................................................235.2.2. TMDS Output..............................................................................................................................................245.2.3. Audio Input.................................................................................................................................................245.2.4. DDC, CEC, Configuration, and Control ........................................................................................................255.2.5. Power and Ground......................................................................................................................................255.2.6. Not Connected and Reserved .....................................................................................................................256. Feature Information ...................................................................................................................................................266.1. RGB to YCbCr Color Space Converter..................................................................................................................266.2. YCbCr to RGB Color Space Converter..................................................................................................................266.3. I2C Register Information .....................................................................................................................................276.4. I2S Audio Input....................................................................................................................................................276.5. Direct Stream Digital Input .................................................................................................................................276.6. S/PDIF Input........................................................................................................................................................276.7. I2S and S/PDIF Supported MCLK Frequencies.....................................................................................................276.8. Audio Downsampler Limitations.........................................................................................................................286.9. High Bitrate Audio on HDMI ...............................................................................................................................296.10. Power Domains...............................................................................................................................................296.11. Internal DDC Master.......................................................................................................................................306.12. Deep Color Support ........................................................................................................................................306.13. Source Termination ........................................................................................................................................316.14. 3D and 4K Video Formats ...............................................................................................................................316.15. Control Signal Connections.............................................................................................................................326.16. Input Data Bus Mapping .................................................................................................................................336.16.1. Common Video Input Formats....................................................................................................................336.16.2. RGB and YCbCr 4:4:4 Separate Sync ...........................................................................................................346.16.3. YC 4:2:2 Separate Sync Formats .................................................................................................................366.16.4. YC 4:2:2 Embedded Syncs Formats.............................................................................................................386.16.5. YC Mux 4:2:2 Separate Sync Formats .........................................................................................................406.16.6. YC Mux 4:2:2 Embedded Sync Formats ......................................................................................................426.16.7. RGB and YCbCr 4:4:4 Dual Edge Mode Formats.........................................................................................447. Design Recommendations..........................................................................................................................................477.1. Power Supply Decoupling ...................................................................................................................................477.2. Power Supply Sequencing...................................................................................................................................477.3. ESD Recommendations.......................................................................................................................................477.4. High-Speed TMDS Signals...................................................................................................................................487.4.1. Layout Guidelines .......................................................................................................................................487.4.2. TMDS Output Recommendation ................................................................................................................487.4.3. EMI Considerations.....................................................................................................................................488. Packaging....................................................................................................................................................................498.1. ePad Requirements.............................................................................................................................................498.2. PCB Layout Guidelines........................................................................................................................................498.3. Package Dimensions...........................................................................................................................................508.4. Marking Specification .........................................................................................................................................518.5. Ordering Information..........................................................................................................................................51References..........................................................................................................................................................................52Standards Documents.....................................................................................................................................................52Standards Groups...........................................................................................................................................................52Lattice Semiconductor Documents.................................................................................................................................52Technical Support...........................................................................................................................................................53Revision History ..................................................................................................................................................................54SiI9136-3/SiI1136 HDMI Deep Color TransmitterData Sheet© 2010-2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names aretrademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.4 SiI-DS-1084-DFiguresFigure 1.1. Typical Application for Streaming Sticks.............................................................................................................7Figure 3.1. SiI9136-3/SiI1136 Functional Block Diagram ......................................................................................................9Figure 3.2. Transmitter Video Data Processing Path ............................................................................................................9Figure 4.1. VCCTP Test Point for VCC Noise Tolerance .......................................................................................................14Figure 4.2. IDCK Clock Duty Cycle .......................................................................................................................................19Figure 4.3. Control and Data Single-Edge Setup and Hold Times—EDGE = 1.....................................................................19Figure 4.4. Control and Data Single-Edge Setup and Hold Times—EDGE = 0.....................................................................19Figure 4.5. Control and Data Dual-Edge Setup and Hold Times .........................................................................................19Figure 4.6. VSYNC and HSYNC Delay Times Based on DE ...................................................................................................20Figure 4.7. DE HIGH and LOW Times ..................................................................................................................................20Figure 4.8. Conditions for Use of RESET#............................................................................................................................20Figure 4.9. RESET# Minimum Timings.................................................................................................................................20Figure 4.10. Differential Transition Times ..........................................................................................................................20Figure 4.11. I2S Input Timings .............................................................................................................................................21Figure 4.12. S/PDIF Input Timings.......................................................................................................................................21Figure 4.13. MCLK Timings..................................................................................................................................................21Figure 4.14. DSD Input Timings...........................................................................................................................................21Figure 4.15. I2C Data Valid Delay (Driving Read Cycle Data)...............................................................................................21Figure 5.1. Pin Diagram.......................................................................................................................................................22Figure 6.1. High Speed Data Transmission..........................................................................................................................29Figure 6.2. High Bitrate Stream Before and After Reassembly and Splitting......................................................................29Figure 6.3. High Bitrate Stream After Splitting ...................................................................................................................29Figure 6.4. Simplified Host I2C Interface Using Master DDC Port .......................................................................................30Figure 6.5. Master I2C Supported Transactions..................................................................................................................30Figure 6.6. Controller Connections Schematic....................................................................................................................32Figure 6.7. 8-Bit Color Depth RGB/YCbCr/xvYCC 4:4:4 Timing ...........................................................................................35Figure 6.8. 10-Bit Color Depth RGB/YCbCr/xvYCC 4:4:4 Timing .........................................................................................35Figure 6.9. 12-Bit Color Depth RGB/YCbCr/xvYCC 4:4:4 Timing .........................................................................................35Figure 6.10. 8-Bit Color Depth YC 4:2:2 Timing ..................................................................................................................37Figure 6.11. 10-Bit Color Depth YC 4:2:2 Timing.................................................................................................................37Figure 6.12. 12-Bit Color Depth YC 4:2:2 Timing.................................................................................................................37Figure 6.13. 8-Bit Color Depth YC 4:2:2 Embedded Sync Timing........................................................................................39Figure 6.14. 10-Bit Color Depth YC 4:2:2 Embedded Sync Timing ......................................................................................39Figure 6.15. 12-Bit Color Depth YC 4:2:2 Embedded Sync Timing ......................................................................................39Figure 6.16. 8-Bit Color Depth YC Mux 4:2:2 Timing ..........................................................................................................40Figure 6.17. 10-Bit Color Depth YC Mux 4:2:2 Timing ........................................................................................................41Figure 6.18. 12-Bit Color Depth YC Mux 4:2:2 Timing ........................................................................................................41Figure 6.19. 8-Bit Color Depth YC Mux 4:2:2 Embedded Sync Timing................................................................................42Figure 6.20. 10-Bit Color Depth YC Mux 4:2:2 Embedded Sync Timing..............................................................................43Figure 6.21. 12-Bit Color Depth YC Mux 4:2:2 Embedded Sync Timing..............................................................................43Figure 6.22. 8-Bit Color Depth 4:4:4 Dual Edge Timing ......................................................................................................45Figure 6.23. 10-Bit Color Depth 4:4:4 Dual Edge Timing ....................................................................................................45Figure 6.24. 12-Bit Color Depth 4:4:4 Dual Edge Timing ....................................................................................................45Figure 6.25. 16-Bit Color Depth 4:4:4 Dual Edge Timing ....................................................................................................46Figure 7.1. Decoupling and Bypass Schematic....................................................................................................................47Figure 7.2. Decoupling and Bypass Capacitor Placement...................................................................................................47Figure 8.1. 100-Pin Package Diagram .................................................................................................................................50Figure 8.2. Marking Diagram ..............................................................................................................................................51Figure 8.3. Alternate Topside Marking ...............................................................................................................................51SiI9136-3/SiI1136 HDMI Deep Color TransmitterData Sheet© 2010-2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names aretrademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.SiI-DS-1084-D 5TablesTable 2.1. Product Selection Guide ......................................................................................................................................8Table 4.1. Absolute Maximum Conditions..........................................................................................................................14Table 4.2. Normal Operating Conditions............................................................................................................................14Table 4.3. DC Digital I/O Specifications...............................................................................................................................15Table 4.4. TMDS I/O Specifications.....................................................................................................................................15Table 4.5. DC Specifications................................................................................................................................................16Table 4.6. Video Input AC Specifications............................................................................................................................16Table 4.7. TMDS AC Output Specifications.........................................................................................................................16Table 4.8. S/PDIF Input Port Timings..................................................................................................................................17Table 4.9. I2S Input Port Timings.........................................................................................................................................17Table 4.10. DSD Input Port Timings....................................................................................................................................17Table 4.11. Video AC Timing Specifications........................................................................................................................18Table 4.12. Control Signal Timing Specifications................................................................................................................18Table 6.1. RGB to YCbCr Conversion Formulas...................................................................................................................26Table 6.2. YCbCr-to-RGB Conversion Formula....................................................................................................................26Table 6.3. Control of the Default I2C Addresses with the CI2CA Pin...................................................................................27Table 6.4. Supported MCLK Frequencies............................................................................................................................28Table 6.5. Channel Status Bits Used for Word Length........................................................................................................28Table 6.6. Supported 3D and 4K Video Formats.................................................................................................................31Table 6.7. Video Input Formats ..........................................................................................................................................33Table 6.8. RGB/YCbCr 4:4:4 Separate Sync Data Mapping .................................................................................................34Table 6.9. YC 4:2:2 Separate Sync Data Mapping ...............................................................................................................36Table 6.10. YC 4:2:2 Embedded Sync Data Mapping..........................................................................................................38Table 6.11. YC Mux 4:2:2 Separate Sync Data Mapping.....................................................................................................40Table 6.12. YC Mux 4:2:2 Embedded Sync Data Mapping..................................................................................................42Table 6.13. RGB/YCbCr 4:4:4 Separate Sync Dual-Edge Data Mapping..............................................................................44